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Work item:
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K.Suppl.11 to ITU-T K.131 (ex Suppl._to-K.soft_des)
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Subject/title:
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Soft error measures for FPGA
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Status:
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Agreed on 2017-11-22
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Approval process:
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Agreement
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Type of work item:
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Supplement
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Version:
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New
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Equivalent number:
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-
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Timing:
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-
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Liaison:
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-
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Supporting members:
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-
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Summary:
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Soft error mitigation for FPGA is described in this section. FPGA is the mainstream of recent LSI and many of them are used in equipment for communication as main device. First, trend of soft error rate along with miniaturization of manufacturing process rules for semiconductor is described, and mitigation techniques such as material, physical layout, and design tool that FPGA venders provide to users are outlined. Next, design methodology of communication equipment, which considers reliability specification by using those mitigation measures, is discussed. Finally, recent trend for mitigation measures for FPGA is explained.
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Comment:
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-
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Reference(s):
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Historic references:
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Contact(s):
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| ITU-T A.5 justification(s): |
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First registration in the WP:
2017-06-05 11:11:14
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Last update:
2017-12-12 16:07:54
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