1 Scope
2
References
3
Abbreviations
4
Reference configuration and functional description
5
HDSL core specification
5.1 Functions
5.1.1 Transparent transport of core frames
5.1.2
Stuffing and destuffing
5.1.3 CRC-6 procedures and transmission error
detection
5.1.4 Error reporting
5.1.5 Failure detection
5.1.6 Failure reporting
5.1.7 Bit
timing
5.1.8 Frame alignment
5.1.9 HDSL transceiver autonomous start-up
control
5.1.10 Loopback control and coordination
5.1.11 Mapping between core frames and HDSL
frames
5.1.12 Control of the maintenance channel
5.1.13 Synchronization and coordination of HDSL
transceivers
5.1.14 Identification of pairs
5.1.15 Correction of pair identification
5.1.16 Remote power feeding
5.1.17 Wetting current
5.2 Transmission medium
5.2.1 Description
5.2.2 Minimum Digital Local Line (DLL)
requirements for HDSL applications
5.2.3 DLL physical characteristics
5.2.4 DLL electrical characteristics
5.3 Transmission method
5.3.1 General
5.3.2 Transmission on three-pairs
5.3.3 Transmission on two-pairs
5.3.4 Transmission on one-pair
5.3.5 Transmission on four-pairs
5.3.6 Line code
5.3.7 Line symbol rate
5.4 Frame structure
5.4.1 Core frame
5.4.2 2B1Q HDSL frame
5.4.3 Scrambling method
5.5 HDSL embedded operations channel (eoc)
5.5.1 Functions of the HDSL eoc
5.5.2 HDSL eoc acknowledgement protocol
5.5.3 The HDSL eoc data read/write mode
5.5.4 HDSL eoc-message list
5.5.5 HDSL eoc-message set requirements
5.5.6 Data registers in the NTU and in
regenerators
5.5.7 Noise margin
5.6 Start-up procedure
5.6.1 General
5.6.2 Control and status signals
5.6.3
Transmitted signals
5.6.4 Timers
5.6.5 Activation state diagrams
5.6.6 Regenerator related procedures
5.7 Operation and maintenance
5.7.1 Functions at the LTU external OAM
reference point
5.7.2 Functions at the NTU external OAM
reference point
5.7.3 OAM messages and functions supported by
the HDSL core
5.7.4 Power feeding related OAM functions
5.7.5 Regenerator behaviour
5.8 Electrical characteristics of a single 2B1Q transceiver
5.8.1 General
5.8.2 Transmitter/receiver impedance and return
loss
5.8.3 Transceiver reference clock
5.8.4 Transmitter output characteristics
5.8.5 Unbalance about earth
5.9 Performance of individual HDSL transceivers
5.9.1 Performance requirements
5.9.2 DLL physical models (test loops)
5.9.3 Jitter and wander
6
Common circuitry specification
6.1 Delay difference buffer
6.2 The pair identification mechanism
6.2.1 Pair identification initial values
6.2.2 Pair identification at the NTU
6.2.3 Pair identification at the LTU
6.3 Laboratory performance measurements
6.3.1
General
6.3.2 Test configuration
6.3.3 Test procedure with shaped noise
6.3.4 Test procedure for impulse noise
6.3.5 Common mode rejection test
6.3.6 Micro
interruption test
7
Power feeding
7.1 General
7.2 Wetting current
7.3 Remote power feeding aspects
7.3.1 Remote power feeding aspects at the LTU
7.3.2 Remote power feeding aspects at the NTU
7.3.3 Remote power feeding aspects at the
regenerator
8
Environmental requirements
8.1 Climatic conditions
8.2 Safety
8.3 Overvoltage protection
8.4 Electromagnetic
compatibility (EMC)
Annex A – Transmission system for 1544 kbit/s two-pair system application
A.1 Frame structure of the two-pair system for 784 kbit/s
Annex B – High bit rate Digital Subscriber Line (HDSL) CAP based system
B.1 Scope and general information
B.1.1 Scope
B.2 References
B.3 Abbreviations
B.4 Reference configuration and functional description
B.5 HDSL core specification
B.5.1
Functions
B.5.2 Transmission medium
B.5.3 Transmission method
B.5.4 Frame structure
B.5.5 HDSL embedded operations channel (eoc)
B.5.6
Start-up procedure
B.5.7 Operation and maintenance
B.5.8 Electrical characteristics of CAP-based
transceivers
B.5.9 Performance of individual HDSL
transceivers
B.6 Common circuitry specification
B.6.1 Delay difference buffer
B.6.2 Laboratory performance measurement tests
B.7 Power feeding
B.8 Environmental requirements
Appendix I – Application specific examples
I.1 Application specific requirements for ISDN PRA with 2048
kbit/s
I.1.1 Mapping of 2048 kbit/s to HDSL
I.1.2 Mapping of HDSL maintenance functions to
the interface
I.1.3 Performance
I.2 Application specific requirements for the European 2048 kbit/s
digital unstructured leased line (D2048U)
I.2.1 Application interfaces
I.2.2 Mapping of the D2048U signal to HDSL
I.2.3
Mapping of HDSL maintenance functions to the interface
I.2.4 Performance
I.3 Application specific requirements for the European 2048 kbit/s
digital structured leased line (D2048S)
I.3.1 Application interfaces
I.3.2 Mapping of the D2048S signal to HDSL
I.3.3 Mapping of HDSL maintenance functions to
the interface
I.3.4 Performance
I.4 Application specific requirements for fractional installation
I.4.1 Mapping of fractional services to HDSL
I.4.2 Mapping of HDSL maintenance functions to
the interface
I.4.3 Performance
I.5 Application specific requirements for partial operation
I.5.1 Mapping of the application frame for
partial operation application
I.5.2 Mapping of HDSL maintenance functions to
the interface
I.5.3 Performance
I.5.4 Remote power feeding
I.5.5 Partial failure criteria
I.5.6 Action following partial failure
I.5.7 Time slot prioritization/reallocation
I.6 Application specific requirements for the 2048 kbit/s mapped
into TU-12 structure
I.6.1 Reference Configuration
I.6.2 Application Interfaces
I.6.3 Mapping of application frame into HDSL
using TU-12 structure
I.6.4 Mapping of HDSL maintenance functions to
the interface
I.6.5 Performance
Appendix II – Detailed definition of cable characteristics and test loops
II.1 Typical characteristics of cables
II.2 Theoretical characteristics of test loops for Y = 31 dB at 150
kHz
Appendix III – Bibliography