CONTENTS

 1     Scope
 2     References
 3     Definitions
 4     Abbreviations
 5     Interchange circuits
        5.1     List of interchange circuits
        5.2     Asynchronous character-mode interfacing
 6     Line signals
        6.1     Data signalling rates
        6.2     Symbol rate
        6.3     Encoder for non-transparent mode
                  6.3.1     Scrambler
                  6.3.2     Mapping parameters
                  6.3.3     Input bit parsing
                  6.3.4     Modulus encoder
                  6.3.5     Mapper
                  6.3.6     Differential encoding
                  6.3.7     Sign assignment
                  6.3.8     Mux
                  6.3.9     Control channel bit assignment
        6.4     Control channel
        6.5     Encoder for transparent mode
 7     Start-up sequences
        7.1     B1
        7.2     CP
        7.3     DIL
        7.4     E_u
        7.5     E_s
        7.6     E_z
        7.7     E_m
        7.8     INFO
        7.9     J
       7.10     PHIL
       7.11     SCR
 8     Operating procedures
        8.1     Phase 1
        8.2     V.91 start-up
                  8.2.1     Call and answer modem
        8.3     Escape to V.34
                  8.3.1     Call modem
                  8.3.2     Answer modem
        8.4     Retrains
                  8.4.1     Initiating retrain
                  8.4.2     Responding to retrain
        8.5     Loss of frame synchronization
        8.6     Cleardown
        8.7     Transparent mode
        8.8     Four-wire leased line operation
 9     Testing facilities
10     Glossary
Appendix I – Typical network configuration