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2 Transport aspects
Table 17-3 JC, NJO and PJO interpretation
JC
NJO PJO
bits 7 8
0 0 justification byte data byte
0 1 data byte data byte
1 0 justification byte data byte
(Note)
1 1 justification byte justification byte
NOTE – A mapper circuit does not generate this code. Due to bit errors a de-mapper circuit might receive this code.
The value contained in NJO and PJO when they are used as justification bytes is all-0s. The receiver is
required to ignore the value contained in these bytes whenever they are used as justification bytes.
During a signal fail condition of the incoming CBR2G5, CBR10G or CBR40G client signal (e.g., in the case of a
loss of input signal), this failed incoming signal is replaced by the generic-AIS signal as specified in clause
16.6.1, and is then mapped into the OPUk.
During a signal fail condition of the incoming 10GBASE-R type CBR10G3 client signal (e.g., in the case of a
loss of input signal), this failed incoming 10GBASE-R signal is replaced by a stream of 66B blocks, with each
block carrying two local fault sequence ordered sets (as specified in [IEEE 802.3]). This replacement signal is
then mapped into the OPU2e.
During the signal fail condition of the incoming ODUk/OPUk signal (e.g., in the case of an ODUk-AIS, ODUk-
LCK, ODUk-OCI condition) the generic-AIS pattern as specified in clause 16.6.1 is generated as a
replacement signal for the lost CBR2G5, CBR10G or CBR40G signal.
During the signal fail condition of the incoming ODU2e/OPU2e signal (e.g., in the case of an ODU2e-AIS,
ODU2e-LCK, ODU2e-OCI condition) a stream of 66B blocks, with each block carrying two local fault
sequence ordered sets (as specified in [IEEE 802.3]) is generated as a replacement signal for the lost
10GBASE-R signal.
NOTE 4 – Local fault sequence ordered set is /K28.4/D0.0/D0.0/D1.0/. The 66B block contains the following value
SH=10 0x55 00 00 01 00 00 00 01.
NOTE 5 – Equipment developed prior to Edition 2.5 of this Recommendation may generate a different 10GBASE-R
replacement signal (e.g., Generic-AIS) than the local fault sequence ordered set.
Asynchronous mapping
The OPUk signal for the asynchronous mapping is created from a locally generated clock (within the limits
specified in Table 7-3), which is independent of the CBR2G5, CBR10G or CBR40G (i.e., 4 (k– 1) × 2 488 320
kbit/s (k = 1,2,3)) client signal.
The CBR2G5, CBR10G, CBR40G (i.e., 4 (k–1) × 2 488 320 kbit/s (k = 1,2,3)) signal is mapped into the OPUk
using a positive/negative/zero (pnz) justification scheme.
Bit-synchronous mapping
The OPUk clock for bit-synchronous mapping is derived from the CBR2G5, CBR10G, CBR40G or CBR10G3
client signal. During signal fail conditions of the incoming CBR2G5, CBR10G, CBR40G or CBR10G3 signal
(e.g., in the case of a loss of input signal), the OPUk payload signal bit rate shall be within the limits
specified in Table 7-3 and the limits defined for the ODCb clock in [ITU-T G.8251] and no OPUk frame phase
discontinuity shall be introduced in this case and when resynchronizing on the incoming CBR2G5, CBR10G,
CBR40G or CBR10G3 signal.
The CBR2G5, CBR10G, CBR40G or CBR10G3 signal is mapped into the OPUk without using the justification
capability within the OPUk frame: NJO contains a justification byte, PJO contains a data byte, and the JC
signal is fixed to 00.
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